Reliability Information Analysis Center Forums

Go Back   Reliability Information Analysis Center Forums > RIAC Topics > Reliability Models
Register FAQ Members List Search Today's Posts Mark Forums Read

Thread Tools Display Modes
Old 02-09-2000, 11:11 AM
Guest Guest is offline
Senior Member
Join Date: May 2007
Posts: 968
Default False Alarm Rate Model in BIT circuitry analysis


Does someone have some experience about False Alarm Rate Models in BIT circuitry analysis? Any information is welcome. Thanks.

Reply With Quote
Old 02-17-2000, 10:37 AM
RIAC Staff Member RIAC Staff Member is offline
Join Date: May 2007
Posts: 664
Default False Alarm Rates

False alarms usually occur in 1 to 45% of the detected faults if the definition is expanded to include can-not duplicate failures. Obviously, one would like to minimize this effect and this generally is accomplished by designing repeated or recycled tests for each fault detection or increasing the tolerance factors for performance parameters. Analyzing to determine the level of false alarms requires the use of detailed and costly programs such as the STAMP program. In 1981, Hughes Aircraft Company did a study on this condition. The report is called "Anaylsis of Built-In-Test False Alarm Conditions, RADC-TR-81-220 that has some interesting comments on built-in-test and its limitations.
Reply With Quote

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off

Forum Jump

All times are GMT -4. The time now is 06:24 PM.

Powered by vBulletin® Version 3.8.4
Copyright ©2000 - 2015, Jelsoft Enterprises Ltd.