Reliability of Leadless Interconnects in GaAs ASICs

C.C. Zang and Aris Christou, Materials Science and Engineering Department and Mechanical Engineering Department, University of Maryland

Introduction

Polyimide has been used as the interfacial dielectric between leadless metal layers for a number of GaAs technologies and will not be reviewed here (1-5). The elimination of Pb from GaAs metal interfaces is desirable from a defect point of view since Pb is a fast diffuser in GaAs. However, GaAs is nine times as brittle as silicon, and hence reliability problems due to microcracks may be introduced. In order to reduce interfacial shearing stresses, a polyimide sacrificial layer has typically been incorporated. In summary, problems with polyimide dielectrics have been previously related to the etching process, which tends to create rough edges, resulting in poor coverage for subsequent formation of W-Mo, and W-Al-W interconnects. This body of information has been reviewed in order to attain a better understanding of the material diffusion problem. The following Physics of Failure model is based on the experimental data previously reported (6). Polyimide ­ metal leadless interconnects are also necessary in order to attain a high power handling capability from a microwave GaAs FET, where unit cell devices must be connected in parallel to form a device having a high total gate width.

As shown in Figure 1, the predominant failure mode for polyimide-leadless metal interconnects in GaAs ASICs was that the metal diffusion through a polyimide dielectric interlayer to the second level metal, resulting in the shorts between the multi-level metal layers. The failure may have occurred at the poor step coverage locations or at metal mask created microcracks. Such locations have high thermal stresses during device operation due to the difference of thermal expansion coefficients (CTE) among different materials used in the metallization module. High stress concentration could lead to crack initiation and propagation through polyimide. Therefore, the crack can behave as a fast diffusion path where the neighboring metals may be shorted by stressassisted diffusion along cracks under elevated temperatures and thermal stress gradients. The crack may also act as a fuse link between two previously isolated conductors which may be catastrophically connected at a critical bias level.

In this investigation, we have developed a reliability model to calculate the failure rate for the polyimide-leadless interconnects in GaAs ASICs by modeling the metal diffusion process through an internal microcrack within the polyimide layer. The detailed procedure is described in the following sections. The polyimide (PI 2555) layer 3 microns thick was spun on metal 2 and cured at 240°C for one hour. The metallization layer was a multi-layer W/Al/W, with dimensions shown in Figure 1 and Table 3.

Figure 1a. Metal 4 and Metal 2 becomes shortened by fast diffusion of the metallization along a crack through the polyimide layer (Click to Zoom)

Figure 1b. Cross section of the PQFP package is shown (Click to Zoom)


Model Methodology

The shorts between Metal 4 and Metal 2 through the polyimide interlayer can be described as a diffusion process of the metal under thermal stresses. The basic equations for stress-assisted diffusion are given as follows. The potential gradient Δ V(xyz) exerts a force F on diffusive M4 ions and is by the equation:

(1) F = - Δ V
The diffusion velocity for the affected M4 concentration is expressed in terms of diffusion mobility as:

(2) n = MF
where M is the diffusion mobility and M = D / kT. The resulting flux of atoms at any cross-section is a function of the diffusion coefficient, and applying equation (2) we obtain:

(3) J = cv = MFc = -( D / kT )cΔV
Equation (3) is a general equation which allows us to insert the appropriate force which is accelerating the diffusion process. The diffusion flux also allows us to calculate the concentration at any point within the device structure. By adding the concentration gradient along the microcrack, the total diffusion flux is:

J = -d ( Δc + ( cΔV ) / kT )
and, the following partial differential equation for the concentration is obtained:

(4) δc / δt = Δ [ D ( Δc + ( cΔV ) / kT ) ]
In general, V could be the electric field, stress, temperature, etc., depending on the product's life cycle.

For polyimide interlayers, assuming no current flow, the diffusion process with the stress gradient can be given by a modification of the above differential equation.

(5) δc / δt = Δ[ D ( Δc + ( cΩΔσ ) / kT ) ]
where Δσ is stress gradient, and Ω is atomic volume. Since the metallization layers are thin (1000-3000Å ), it is assumed that diffusion coefficient is relatively constant and temperature gradient is neglected. Therefore,

(6)


Assuming that c0 is the concentration necessary for failure, the time to failure can be given by:

(7)
Equation (7) may be further modified to include a distribution function of defects in M4.

The algorithm for modeling the diffusion process of Metal 4 through the polyimide interlayer is as follows:

1) Determine the temperature profile of the circuit under real operating conditions:

     · T(x, y): Finite element analysis is the appropriate tool.

2) Determine the resulting thermal stress profile:

     · (x, y): Finite element analysis is again the appropriate tool.

3) Model stress-assisted diffusion along microcracks within the polyimide by solving equation (7).

The time to failure may be defined as the time for metal atoms to reach a certain critical concentration at the neighboring metal line (M2). Numerical solution or possible analytical solution of the diffusion equation must be carried out in order to fully understand the magnitude of the problem.



Thermal Analysis

A three dimensional finite element model for the GaAs ASIC package has been developed in order to obtain the maximum temperature rise during operation. A plastic quad flat package (PQFP) with copper heat spreader was used in our model. Figure 2 shows one quarter of the package. The model developed has considered only heat conduction but it does have general applicability. This is the global FEA model which determines the appropriate boundary conditions for the local analysis. The global model presents the finite element mesh for the entire package geometry, which then allows a local analysis to be established by appropriating the necessary boundary condition.

Figure 2a. 3D finite element model for thermal analysis of PQFP (Click to Zoom)

Figure 2b. 3D finite element model for thermal analysis of PQFP (Click to Zoom)

Figure 2c. 3D finite element model for thermal analysis of PQFP (Click to Zoom)
Table 1: Thermal conductivity of each material used in thermal analysis [1]

Material	1(W/mK)
Chip (GaAs)	47
Leads (CuMo)	200
Heat Sink	300
Die attach (Epoxy)	5
Molding compound (phenoformyldahide)	0.67
PC board	0.3

Table 1 lists the thermal conductivity of each material applied in the thermal analysis. Convection heat transfer is considered as boundary conditions applied to the package and board surfaces. The convection coefficient with a value of 25W/m2 °C was applied to the plastic package surface, and a value of 10W/m2 °C was applied to the PCB board onto which the PFQP package was attached.

Typical package dimensions (mm) used in the present example:

Package size:		28 x 28 x 3.2
Chip size:		6 x 6 x 0.4
Epoxy thickness:		0.15
Cu heat spreader:		14 x 14 x 0.5
Lead thickness:		0.15
Tape thickness:		0.15
PC board size:		60 x 60 x 1.7

Figure 3 shows the temperature profile of PQFP package with power dissipation in the package as determined under the applied bias conditions. The maximum temperature was found to be 123°C. The thermal resistance can be calculated as follows: θ_ja = (T_j - T_a)/Q, where is thermal resistance from junction to ambient; T_j is junction temperature; T_a is ambient temperature; and Q is total power dissipation. Then the thermal resistance is: θ_ja = (123-25) / 4 = 24.5(°C / W).

Figure 3a. FEM results of temperature profile for 3D thermal analysis (Click to Zoom)

Figure 3b. FEM results of temperature profile for 3D thermal analysis (Click to Zoom)


Thermal stress analysis

After the maximum temperature rise for the GaAs ASIC package is obtained, we have developed a 2D finite element model for the local thermal stress analysis. Figure 4 shows a 2D finite element model from multilevel leadless metal layers with the polyimide interlayers. Tables 2a and 2b show the materials properties used in the 2D thermal stress analysis model. The ASCI is subjected to heating from 25 to 123°C, based on the results from the above thermal analysis model. The resulting stresses are shown in Figure 5. The maximum thermal stresses were found at the location of a polyimide microcrack. Figure 6 shows the stress change from the metal 4 along polyimide interlayer to metal 2.

Figure 4. 2D finite element model for thermal stress analysis (Click to Zoom)
Table 2a: Material properties of each material used in 2D finite element model [2]

Material	Young's Modul (GPa)	CTE (x10-6)	Poisson Ratio
Aluminum	69	25	0.345
Tungsten	407	4.5	0.28
Polyimide	4	40	0.35
Nitride	314	2.8	0.22
Oxide	70	0.6	0.22
GaAs	85	5.7	0.31

Table 2b: Material/layer thickness applied in 2D FEA model

Thickness (Å)	Layer
10000	Oxide
10000	Metal 1 (W/Al/W)
10000	Polyimide
10000	Metal 2 (W/Al/W)
16500	Polyimide 3
17000	Metal 3 (W/Al/W)
16500	Polyimide 4
17000	Metal 4 (W/Al)
17000	Passivation (nitride)

Figure 5a. Thermal stress s_x profile of 2D FEM model (Click to Zoom)

Figure 5b. Thermal stress s_y profile of 2D FEM model (Click to Zoom)

Figure 6a. Thermal stress s_x change from M4 along polyimide to M2 (Click to Zoom)

Figure 6b. Thermal stress s_y change from M4 along polyimide to M2 (Click to Zoom)


Stressed-assisted diffusion through polyimide

As presented above, the shorts between metal 4 and metal 2 though a microcrack inside the polyimide interlayer can be described as a stress-assisted diffusion process given by the following equation:

(8)

This time to failure in terms of certain concentration criteria at x = L is given by:

(9)

We now know σ, T, ΔT from the finite element analysis and these values will be used to numerically analyze equation (9), and to solve equation (8).

The partial differential diffusion equation with the stress gradient is solved numerically using Mathematica. The stress gradient is obtained from the thermal stress distribution shown in Figure 6(a). However, there is limited data for the diffusion coefficient of aluminum in polyimide, and care was taken to use the appropriate D in our analysis.

The diffusivity of aluminum in a polymer at 150°C was found to be 1.4 x 10-17 cm2/sec from reference [3]. if we assume the diffusion coefficient of aluminum in polyimide obeys an Arrhenius equation D = D₀exp(Q/kT), and also assume the activation energy is 0.5eV similar to that of copper in polyimide (0.46eV [4]), the diffusion coefficient of aluminum in polyimide can be estimated and is shown in Table 3.

However, in our case, the metal 4 diffusion is through the polyimide along a microcrack which is a fast diffusion path and whose diffusivity can be much larger than that which occurs in bulk polyimide (D_crack/D_bulk=10⁴). Then the diffusivity of aluminum along polyimide crack used in our calculation is given as follows:

Table 3: Calculated diffusivity D of aluminum through polyimide

Temperature	Dcrack (cm2/sec)
373K (100°C)	2.243 x 10-14
396K (123°C)	5.509 x 10-14
413K (140°C)	1.003 x 10-13

If we consider C/C₀=0.1 at x=L (as shown in Figure 7) as a failure criteria for a M4 to M2 short, the time to reach this failure criteria calculated using numerical methods for 100°C, 123°C, and 140°C are listed as follows. We note that 123°C is the temperature rise at the microcrack and a failure can occur within 20 hours of continuous testing at the ASIC dc bias conditions.

Figure 7. Calculated time to failure of polyimide-metal interconnects in ASICs as a function of operation temperatures for three different failure criteria (Click to Zoom)

Temperature	Time to Failure
	c/c0 = 0.05	c/c0 = 0.1	c/c0 = 0.2
373K (100°C)	16.7 hours	51 hours	133 hours
396K (123°C)	6.7 hours	20.5 hours	52 hours
413K (140°C)	3.7 hours	11 hours	29 hours

The activation energy for the failure can then be calculated to be 0.485eV for all three different criteria and is shown in Figure 8.

Figure 8. The activation energy of failure for GaAs ASICs due to shorts of M4 and M2 through polyimide is found to be 0.484 eV (Click to Zoom)


Summary

A physical reliability model has been developed to calculate the time to failure of polyimide-metal leadless interconnected GaAs microwave integrated circuits due to the shorts between metal 4 and metal 2 through polyimide interlayer. The failure mechanism for the shorts between neighboring metals through polyimide is described as a stress-assisted diffusion process along a polyimide microcrack due to the poor process step and high thermal stress concentration. The finite element method (FEM) has been used to determine the arising temperature during operation and the resulting thermal stress due to the difference of coefficients of thermal expansion (CTE) of materials used in multilevel metallization module of devices. Numerical methods have been used to solve the partial differential diffusion equations with stress gradient in order to obtain the time to failure of the devices. The time to failure for the shorts between metal 4 and metal 2 at 123°C operating temperature was calculated to be about 20 hours for the conditions detected. The activation energy for the failure of the shorts between metal 4 and metal 2 was calculated to be 0.484eV. These activation energies and mean time to failure are short and limit the ultimate reliability of leadless GaAs technologies.



References

1. D. R. Edwards, M. Hwang, and B. Stearns, IEEE Trans. Components. Packaging, and Manufacturing Technology, A, vol. 18, 57 (1995).


2. J. Y. Evans and J. W. Evans, Electronic materials and properties in Handbook of Electronic Package Design, eds. M. Pecht, Marcel Dekker, New York, 1991.


3. D. Popovici, K. Piyalcis, M. Meunier, and E. Sacher, J. Appl. Phys. Vol8l, 108 (1998).


4. R. Willecke, and A. Thran, Mater. Sci. & Eng. R, vol R22, I (1998).


5. B. Turner, W.P. Barr, D.P. Cooper and D.J. Taylor, Electronic Lettr, Vol. 17, No.5, 185-187 (1981).


6. G. N. Chaudhari and V. J. Rao, Appl Phys. A 56, 353-354 (1993).


7. J-H Jou and L-J Chen, Appl. Phys. Lett. 59 (1), 46-49 (1991).


8. J-K Hsu and K.M. Lau, J. Appl. Phys. 63 (3), 962-964 (1988).